The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Jun. 29, 2016
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Kyle Schulmeyer, Plano, TX (US);

Sualp Aras, Dallas, TX (US);

Abidur Rahman, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01); H03K 5/08 (2006.01); H02M 3/07 (2006.01);
U.S. Cl.
CPC ...
H03K 17/687 (2013.01); H02M 3/07 (2013.01); H03K 5/08 (2013.01);
Abstract

An apparatus includes a FET device having a drain terminal, source terminal and a gate terminal; a first supply voltage coupled to the drain terminal of the FET; an output terminal coupled to the source terminal of the FET; a bias current supply coupled to the gate terminal of the FET; a second supply voltage coupled to the gate terminal of the FET; a current sensing circuit coupled to output a sense current proportional to the current flowing through the FET; a current limit comparator coupled to the sense current and comparing the sense current to a predetermined limit current; a pull down current circuit coupled to remove current from the gate terminal of the FET; a current time derivative circuit coupled to the sense current and outputting a sense rate current; and a circuit coupled to receive the sense rate current and coupled to the bias current supply.


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