The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Mar. 29, 2017
Applicant:

Kaneka Corporation, Osaka, JP;

Inventors:

Toshihiko Uto, Osaka, JP;

Daisuke Adachi, Osaka, JP;

Assignee:

Kaneka Corporation, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/0236 (2006.01); H01L 31/0747 (2012.01); H01L 31/18 (2006.01); H01L 31/20 (2006.01);
U.S. Cl.
CPC ...
H01L 31/1804 (2013.01); H01L 31/0236 (2013.01); H01L 31/0747 (2013.01); H01L 31/202 (2013.01); Y02E 10/50 (2013.01);
Abstract

A manufacturing method includes steps of forming a texture on a surface of a single-crystalline silicon substrate, cleaning the surface of the single-crystalline silicon substrate using ozone, depositing an intrinsic silicon-based layer on the texture on the single-crystalline silicon substrate, and depositing a conductive silicon-based layer on the intrinsic silicon-based layer, in this order. The single-crystalline silicon substrate before deposition of the intrinsic silicon-based layer has a texture size of less than 5 μm. A recess portion of the texture has a curvature radius of less than 5 nm. After deposition of at least a part of the intrinsic silicon-based layer and before deposition of the conductive silicon-based layer, the intrinsic silicon-based layer is subjected to a plasma treatment in an atmosphere of a gas mainly composed of hydrogen.


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