The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Mar. 03, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventor:

Shinya Takahashi, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/11565 (2013.01);
Abstract

A semiconductor memory device according to an embodiment, includes a stacked body, first and second semiconductor pillars and a contact. The stacked body includes insulating films and electrode films stacked alternately along a first direction. A configuration of an end portion of the stacked body in a second direction is a stairstep configuration. A step is formed in the stairstep configuration for each of the electrode films. The first semiconductor pillars are disposed in a region of the stacked body where the steps are not formed. The second semiconductor pillars are disposed in a region of the stacked body where the steps are formed. The contact is disposed on the electrode film for each of the steps. When viewed from the first direction, the first and second semiconductor pillars are disposed at some of lattice points of a lattice.


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