The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2018
Filed:
Jul. 14, 2016
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Sebastian T. Ventrone, South Burlington, VT (US);
Sudeep Mandal, Bangalore, IN;
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/00 (2006.01); G11C 15/04 (2006.01); G11C 15/06 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); G11C 15/04 (2013.01); G11C 15/06 (2013.01); H01L 2225/0652 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06558 (2013.01); H01L 2225/06572 (2013.01);
Abstract
The present disclosure generally relates to semiconductor structures and, more particularly, to intelligent through silicon via sharing in 3D-IC integrated structures and methods of manufacture. The structure includes: a plurality of stacked dies each containing at least one macro device; and a layer structure positioned between the plurality of stacked dies which comprises a control structured to route signals between the at least one macro device of a first stacked die and the at least one macro device of a second stacked die of the plurality of stacked dies.