The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Apr. 10, 2017
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventor:

Jae Hwan Kim, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 27/108 (2013.01);
Abstract

A power line layout structure of the semiconductor device may include first through fifth power lines. The first and second power lines may be located at a first layer, and may provide different types of power-supply voltages. The third power line may be located at a second layer disposed at a level different from that of the first layer. The third power line may be coupled to the first power line through a first contact, and may extend in the same direction as the first power line. The fourth power line may be located at the second layer, and may be coupled to the second power line through a second contact. The fourth power line may extend in the same direction as the second power line. The fifth power line may be disposed between the first power line and the second power line in the first layer.


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