The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Oct. 31, 2014
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Benjamin Tsien, Fremont, CA (US);

Denis Rystsov, San Francisco, CA (US);

Sebastien Nussbaum, Lexington, MA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); G06F 21/57 (2013.01); G06F 21/50 (2013.01); G06F 1/26 (2006.01); G06F 21/81 (2013.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 21/57 (2013.01); G06F 1/26 (2013.01); G06F 1/3206 (2013.01); G06F 1/3237 (2013.01); G06F 1/3287 (2013.01); G06F 21/50 (2013.01); G06F 21/81 (2013.01); Y02B 60/1221 (2013.01); Y02B 60/1282 (2013.01);
Abstract

The present disclosure presents methods and apparatuses for controlling a power state, which may include a C-state, of one or more processing cores of a processor. In an aspect, an example method of securing a power state change of a processor is presented, the method including the steps of receiving a power state change request from the processor, the processor having a plurality of potential power states each including an operating power profile; determining a power state change request mode associated with the processor; forwarding the power state change request to a security processor where the power state change request mode is a one-time request mode; receiving a power state change request response from the security processor in response to the request; and adjusting the current power state of the processor to the target power state where the power state change request response comprises a power state change approval.


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