The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2018

Filed:

May. 08, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventor:

Yi-Hung Tseng, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/06 (2006.01); G06F 1/10 (2006.01); H03M 1/74 (2006.01); H03K 5/24 (2006.01); H03M 1/00 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H03M 1/66 (2013.01); H03M 1/0617 (2013.01); G06F 1/10 (2013.01); H03K 5/2481 (2013.01); H03K 19/00315 (2013.01); H03K 19/00361 (2013.01); H03M 1/00 (2013.01); H03M 1/745 (2013.01); H03M 1/747 (2013.01);
Abstract

Certain aspects of the present disclosure provide digital-to-analog converters (DACs). One example DAC generally includes a first transistor configured to selectively couple a power source to a load. In a first mode of operation of the DAC, the first transistor is closed and couples the load to the power source. In a second mode of operation of the DAC, the first transistor is open and decouples the load from the power source. The DAC further includes a current limiting circuit selectively coupled between the first transistor and a reference voltage. In the first mode, the current limiting circuit is decoupled from the reference voltage. In the second mode, the current limiting circuit is coupled to the reference voltage.


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