The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2018

Filed:

Jun. 09, 2014
Applicants:

Meisei Gakuen, Hino-shi, JP;

Buffalo Memory Co., Ltd., Nagoya-shi, JP;

Inventors:

Kanji Otsuka, Hino, JP;

Yoichi Sato, Hino, JP;

Takayuki Okinaga, Nagoya, JP;

Shuichiro Azuma, Nagoya, JP;

Assignees:

MEISEI GAKUEN, Hino-shi, JP;

BUFFALO MEMORY CO., LTD., Nagoya-shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/17 (2006.01); H03K 19/21 (2006.01); G06F 1/02 (2006.01);
U.S. Cl.
CPC ...
H03K 19/21 (2013.01); G06F 1/02 (2013.01);
Abstract

An arithmetic logic operation device including a memory device configured to store a lookup table and receive an input of a bit string N bits long, N being an integer of at least 2, the input bit string representing an address in the lookup table at which is stored multiple-bit data of which a part includes a bit representative of the result of a logical operation performed between the bits included in the input bit string. The memory device is accessed to output the bits included in the data stored at the address represented by the received bit string. The arithmetic logic device achieves arithmetic processing in a relatively short time on a relatively small circuit scale.


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