The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2018
Filed:
Oct. 20, 2016
Applicant:
SK Hynix Inc., Icheon-Si, KR;
Inventors:
Jeong-Myeong Kim, Icheon-si, KR;
June-Seo Kim, Icheon-si, KR;
Jong-Koo Lim, Icheon-si, KR;
Jung-Hwan Moon, Icheon-si, KR;
Sung-Joon Yoon, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-Si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); G06F 12/0802 (2016.01); G06F 13/42 (2006.01); H01L 27/22 (2006.01); H01L 43/12 (2006.01);
U.S. Cl.
CPC ...
H01L 43/02 (2013.01); G06F 12/0802 (2013.01); G06F 13/4282 (2013.01); H01L 27/222 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01); G06F 2212/60 (2013.01);
Abstract
Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a pinned layer having a pinned magnetization direction; a free layer having a changeable magnetization direction; a tunnel barrier layer interposed between the pinned layer and the free layer, and including a metal oxide; and a carbon-based compound patch positioned at one or more of between the pinned layer and the tunnel barrier layer, between the free layer and the tunnel barrier layer, and in the tunnel barrier layer.