The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2018

Filed:

Jan. 10, 2017
Applicants:

Hauk Han, Hwaseong-si, KR;

Ji Woon Im, Hwaseong-si, KR;

DO Hyung Kim, Seongnam-si, KR;

Hyun Seok Lim, Suwon-si, KR;

Inventors:

Hauk Han, Hwaseong-si, KR;

Ji Woon Im, Hwaseong-si, KR;

Do Hyung Kim, Seongnam-si, KR;

Hyun Seok Lim, Suwon-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 29/36 (2006.01); H01L 27/11582 (2017.01); H01L 29/06 (2006.01); H01L 23/522 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/30604 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 29/0649 (2013.01); H01L 29/36 (2013.01);
Abstract

A semiconductor device includes a first interlayer insulating layer and a second interlayer insulating layer, and a horizontal conductive pattern interposed between the first interlayer insulating layer and the second interlayer insulating layer. Vertical structures extend through the first interlayer insulating layer, the second interlayer insulating layer, and the horizontal conductive pattern. Each of the first interlayer insulating layer and the second interlayer insulating layer has regions of different impurity concentrations.


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