The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2018
Filed:
Feb. 16, 2017
International Business Machines Corporation, Armonk, NY (US);
Pawel Jasionowski, Wroclaw, PL;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and associated systems for using wreath products and invariance groups to test a partially symmetric quantum-logic circuits. A test system receives information that describes the architecture of a quantum-logic circuit to be tested. The system uses this information to hierarchically organize the circuit's inputs into non-overlapping blocks. The system creates set of groups associated with the blocks, and then generates an invariance group that contains one or more invariant permutations of the inputs by computing a wreath product of the set of groups. These invariant permutations identify a minimal number of tests required to verify the circuit for all possible input vectors. The system then directs a test apparatus to perform the resulting optimized test sequence upon the circuit.