The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2018
Filed:
Sep. 17, 2015
Xilinx, Inc., San Jose, CA (US);
Susheel Kumar Puthana, Longmont, CO (US);
Stephen P. Rozum, Loveland, CO (US);
Sudipto Chakraborty, Longmont, CO (US);
David A. Knol, Morgan Hill, CA (US);
Yong Li, Fremont, CA (US);
Fernando J. Martinez Vallina, Sunnyvale, CA (US);
Sonal Santan, San Jose, CA (US);
Nabeel Shirazi, Saratoga, CA (US);
Salil R. Raje, Saratoga, CA (US);
Ethan T. Parker, Tualatin, OR (US);
Suman Kumar Timmireddy, Nellore, IN;
Heera Nand, Alwar, IN;
XILINX, INC., San Jose, CA (US);
Abstract
Implementing hardware accelerators using programmable integrated circuits may include performing, using a processor, a design flow on a static circuit design. The static circuit design may specify a region reserved for a hardware accelerator and a static region comprising interface circuitry configured to couple the hardware accelerator with an external node. The design flow may generate an implemented static circuit design. Metadata describing the interface circuitry may be generated using a processor. A device support archive including the implemented static circuit design and the metadata may be written, using the processor, to a computer readable storage medium.