The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2018

Filed:

Jun. 17, 2014
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventor:

Takeshi Kawashima, Hiratsuka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/10 (2010.01); G02B 1/10 (2015.01); G01N 21/17 (2006.01); G03G 15/04 (2006.01); H01S 5/187 (2006.01); H01L 51/52 (2006.01); H01L 33/46 (2010.01); H01S 3/0941 (2006.01); H01S 5/183 (2006.01); H01S 5/32 (2006.01); H01S 5/343 (2006.01); H01S 5/42 (2006.01); H01S 3/16 (2006.01); H01S 5/30 (2006.01);
U.S. Cl.
CPC ...
G02B 1/105 (2013.01); G01N 21/1702 (2013.01); G03G 15/04072 (2013.01); H01L 33/105 (2013.01); H01S 5/187 (2013.01); H01S 5/18358 (2013.01); H01S 5/18361 (2013.01); H01L 33/10 (2013.01); H01L 33/46 (2013.01); H01L 51/5265 (2013.01); H01S 3/0941 (2013.01); H01S 3/1633 (2013.01); H01S 5/18308 (2013.01); H01S 5/3063 (2013.01); H01S 5/3201 (2013.01); H01S 5/34333 (2013.01); H01S 5/423 (2013.01); H01S 2304/04 (2013.01);
Abstract

A semiconductor distributed Bragg reflector (DBR) including a first multilayer structure including a plurality of first semiconductor layers and one or more second semiconductor layers each interposed between a corresponding pair of the plurality of first semiconductor layers; a second multilayer structure including a plurality of third semiconductor layers and one or more second semiconductor layers each interposed between a corresponding pair of the plurality of third semiconductor layers; and a protection layer interposed between the first multilayer structure and the second multilayer structure. The second semiconductor layer has a lower decomposition temperature than the first semiconductor layer. The third semiconductor layer has a lower decomposition temperature than the second semiconductor layer.


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