The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Apr. 20, 2016
Applicant:

Linear Technology Corporation, Milpitas, CA (US);

Inventors:

Andrew J. Gardner, Santa Barbara, CA (US);

David M. Dwelley, Santa Barbara, CA (US);

Heath Stewart, Santa Barbara, CA (US);

Assignee:

Linear Technology Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02J 1/00 (2006.01); H02J 3/00 (2006.01); H04B 3/54 (2006.01); H04L 12/10 (2006.01); H04L 12/12 (2006.01); H04L 12/403 (2006.01);
U.S. Cl.
CPC ...
H04L 12/10 (2013.01); H04L 12/12 (2013.01); H04L 12/403 (2013.01); Y02B 60/34 (2013.01);
Abstract

A system includes a master and a slave coupled via a wire pair for transmitting differential data. The master and slave are each powered by a local DC power supply. In a normal mode, a DC voltage and differential data are supplied over the same wire pair. The differential data is processed by a PHY AC-coupled to the wire pair. To enter a low power sleep mode, such as due to a temporary non-use of the system, the master interrupts the DC voltage on the wire pair, which signals to the slave to enter the sleep mode. The system is woken up by reapplying the DC voltage to the wire pair to signal to the slave to wake up. Only the DC path, and not the data path, is used for signaling the sleep mode and awake mode, so the data path can be disabled to conserve power.


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