The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2018
Filed:
Apr. 06, 2016
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventors:
Shang-Pin Chen, Hsinchu County, TW;
Sheng-Feng Lee, Hsinchu, TW;
Assignee:
MediaTek Inc., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 1/00 (2006.01); G01R 31/317 (2006.01); H03L 7/00 (2006.01); H04L 7/00 (2006.01); H04L 7/06 (2006.01);
U.S. Cl.
CPC ...
H03L 1/00 (2013.01); G01R 31/31709 (2013.01); H03L 7/00 (2013.01); H04L 7/0087 (2013.01); H04L 7/065 (2013.01);
Abstract
A jitter control circuit within a chip comprises an adaptive PDN, a current generator and a jitter generator. The adaptive PDN is capable of being controlled/modulated to provide difference impedances. The current generator is coupled to the adaptive PDN, and is arranged for receiving a supply voltage provided by the adaptive PDN and generating currents with different patterns. The jitter generator is coupled to the adaptive PDN, and is arranged for generating a plurality of jitters corresponding to the currents with different patterns, respectively, according to the supply voltage provided by the adaptive PDN.