The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Jan. 24, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Deepak I. Hanagandi, Karnataka, IN;

Krishnendu Mondal, Bangalore, IN;

Kiran K. Narayan, Hyderabad, IN;

Michael R. Ouellette, Westford, VT (US);

Michael A. Ziegerhofer, Jeffersonville, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/12 (2006.01); G06F 11/27 (2006.01);
U.S. Cl.
CPC ...
G11C 29/12015 (2013.01); G06F 11/27 (2013.01);
Abstract

A system and method control an operation of a built-in self-test (BIST) of memory devices of an integrated circuit. The method includes generating count values using a program counter, and providing a first burst of instructions to the memory devices. The method also includes controlling a chip enable signal associated with each of the memory devices according to the count values during a wait period following the providing the first burst of instructions until a second burst of instructions is provided to the memory devices. The chip enable signal of each of the memory devices defines clock cycles at which the memory device is operated and clock cycles at which the memory device is idle.


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