The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Jul. 18, 2016
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Min Sang Park, Cheongju-si, KR;

Sung Ho Kim, Cheongju-si, KR;

Kyong Taek Lee, Sejong-si, KR;

Yun Bong Lee, Cheongju-si, KR;

Gil Bok Choi, Daejeon, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/10 (2013.01);
Abstract

There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device may include a memory cell array, a peripheral circuit, a control logic, and one or more programs. The memory cell array may include a plurality of memory cells. The peripheral circuit may perform a program operation on the memory cell array. The control logic may control the peripheral circuit to program the memory cell array. The one or more programs are configured to be executed by the control logic. The programs may include an instruction for pre-programming one or more memory cells to be programmed to one or more target program states to have threshold voltage distributions lower than the target program state.


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