The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Jun. 23, 2015
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;

Inventor:

Chao Dai, Shenzhen, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G09G 3/3266 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/7869 (2013.01); G09G 2320/0214 (2013.01);
Abstract

The present invention provides a GOA circuit based on oxide semiconductor thin film transistor, which cannot only prevent the electrical leakage to raise the reliability of the GOA circuit but also avoid the generation of the crossfire current in the non-function period by shorting the gate and the source of the fortieth thin film transistor (T) in the first pull-down module () for avoiding the influence of the constant high voltage level (DCH) to the pull-down holding of the first node by electrically coupling both the gate and the drain of the seventy-fifth thin film transistor (T) in the pull-down holding module () to the first node (Q(N)), and clearing the interference of the residual charge to the GOA circuit by providing the reset module () to reset the first node (Q(N)) before generating the each frame to guarantee the normal output of the GOA circuit and the normal display of the image.


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