The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2018
Filed:
Jul. 13, 2011
Nathan C. Buck, Underhill, VT (US);
Brian M. Dreibelbis, Underhill, VT (US);
John P. Dubuque, Jericho, VT (US);
Eric A. Foreman, Fairfax, VT (US);
Peter A. Habitz, Hinesburg, VT (US);
Jeffrey G. Hemmett, St. George, VT (US);
Natesan Venkateswaran, Hopewell Junction, NY (US);
Chandramouli Visweswariah, Croton-on-Hudson, NY (US);
Xiaoyue Wang, Kanata, CA;
Vladmimir Zolotov, Putnam Valley, NY (US);
Nathan C. Buck, Underhill, VT (US);
Brian M. Dreibelbis, Underhill, VT (US);
John P. Dubuque, Jericho, VT (US);
Eric A. Foreman, Fairfax, VT (US);
Peter A. Habitz, Hinesburg, VT (US);
Jeffrey G. Hemmett, St. George, VT (US);
Natesan Venkateswaran, Hopewell Junction, NY (US);
Chandramouli Visweswariah, Croton-on-Hudson, NY (US);
Xiaoyue Wang, Kanata, CA;
Vladmimir Zolotov, Putnam Valley, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Solutions for integrating manufacturing feedback into an integrated circuit design are disclosed. In one embodiment, a computer-implemented method is disclosed including: defining an acceptable yield requirement for a first integrated circuit product; obtaining manufacturing data about the first integrated circuit product; performing a regression analysis on data representing paths in the first integrated circuit product to define a plurality of parameter settings based upon the acceptable yield requirement and the manufacturing data; determining a projection corner associated with the parameter settings for satisfying the acceptable yield requirement; and modifying a design of a second integrated circuit product based upon the projection corner and the plurality of parameter settings.