The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Jun. 02, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Joshua W. Bowman, Austin, TX (US);

Sundeep Chadha, Austin, TX (US);

Michael J. Genden, Austin, TX (US);

Dhivya Jeganathan, Austin, TX (US);

Dung Q. Nguyen, Austin, TX (US);

David R. Terry, Austin, TX (US);

Eula F. Tolentino, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3836 (2013.01); G06F 9/30043 (2013.01); G06F 9/3824 (2013.01); G06F 9/3838 (2013.01); G06F 9/3842 (2013.01);
Abstract

An approach is provided is provided in which a computing system matches a writeback instruction tag (ITAG) to an entry instruction tag (ITAG) included in an issue queue entry. The writeback ITAG is provided by a first of multiple load store units. The issue queue entry includes multiple ready bits, each of which corresponds to one of the multiple load store units. In response to matching the writeback ITAG to the entry ITAG, the computer system sets a first ready bit corresponding to the first load store unit. In turn, the computing system issues an instruction corresponding to the entry ITAG based upon detecting that each of the multiple ready bits is set.


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