The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9857864 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 02, 2018

Filed:

Oct. 29, 2014
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Sathish Thoppay Egambaram, Plano, TX (US);

Robert Nasry Hasbun, Fall City, WA (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 12/02 (2006.01); G11C 14/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3275 (2013.01); G06F 12/0246 (2013.01); G11C 14/0045 (2013.01); G06F 2212/7201 (2013.01); G11C 13/0038 (2013.01);
Abstract

According to one or more embodiments of the disclosure, systems and methods for reducing power consumption in a memory architecture are provided. In one embodiment, a method may include determining a transition from a first power state to a second power state. The method may also include determining, using a page location identifier to access a page location table, a first dirty memory page indication. Furthermore, the method may include copying data stored in a first memory location in a volatile memory corresponding to the page location identifier to a second memory location in a non-volatile memory corresponding to the page location identifier. The method may also include deactivating the volatile memory.


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