The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2017

Filed:

Feb. 17, 2017
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventor:

Kentaro Kawakami, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04M 1/00 (2006.01); H04B 1/28 (2006.01); H04W 24/00 (2009.01); H04W 52/02 (2009.01); H04W 56/00 (2009.01); H04W 4/00 (2009.01);
U.S. Cl.
CPC ...
H04W 52/0274 (2013.01); H04W 56/001 (2013.01); H04W 4/005 (2013.01);
Abstract

An integrated circuit system includes a first integrated circuit for which signal modes set to a plurality of first I/O ports in the active mode are maintained in the sleep mode and a second integrated circuit for which a plurality of second I/O ports are placed in a floating state in the sleep mode, wherein the first integrated circuit transmits a first notification signal that indicates an operation mode to the second integrated circuit, wherein the second integrated circuit transmits a second notification signal that indicates an operation mode to the first integrated circuit, and wherein the signal modes of the plurality of first I/O ports and the plurality of second I/O ports are set such as to suppress steady currents persistently flowing between the first I/O ports and the second I/O ports, and to suppress through currents flowing.


Find Patent Forward Citations

Loading…