The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2017
Filed:
Jul. 17, 2015
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Yanxiang Liu, San Diego, TX (US);
Stanley Seungchul Song, San Diego, CA (US);
Kern Rim, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); G06F 17/50 (2006.01); H01L 21/8238 (2006.01); H01L 21/304 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4238 (2013.01); G06F 17/5077 (2013.01); H01L 21/3043 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823871 (2013.01); H01L 27/0207 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01); H01L 29/6681 (2013.01); H01L 23/5386 (2013.01);
Abstract
A method of fabrication of a device includes performing a gate cut to cut a gate line to create a first gate region and a second gate region. The method further includes depositing a conductive material to form a conductive jumper structure to connect the first gate region and the second gate region.