The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Jul. 14, 2015
Applicant:

Denso Corporation, Kariya, Aichi-pref., JP;

Inventors:

Tomofusa Shiga, Nukata-gun, JP;

Hiromitsu Tanabe, Chiryu, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 21/66 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 23/482 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7397 (2013.01); H01L 22/14 (2013.01); H01L 22/32 (2013.01); H01L 23/4824 (2013.01); H01L 23/49562 (2013.01); H01L 24/48 (2013.01); H01L 29/0696 (2013.01); H01L 29/407 (2013.01); H01L 29/4236 (2013.01); H01L 29/4238 (2013.01); H01L 29/66348 (2013.01); H01L 29/0619 (2013.01); H01L 2224/4813 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A semiconductor device provides an element arrangement region on a semiconductor substrate including: a first semiconductor region on the semiconductor substrate; a second semiconductor region on the first semiconductor region; multiple trench gates penetrating the first semiconductor region and reaching the second semiconductor region; a third semiconductor region contacting the trench gate; a fourth semiconductor region on a rear surface; a first electrode connected to the first and second semiconductor regions; and a second electrode connected to the fourth semiconductor region. Each trench gate includes a main trench gate for generating a channel and a dummy trench gate for improving a withstand voltage of a component. The device further includes: a dummy gate wiring for applying a predetermined voltage to the dummy trench gate; and a dummy pad connected to the dummy gate wiring. The dummy pad and the first electrode are connected by a conductive member.


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