The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Feb. 17, 2017
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Ki Jun Sung, Cheongju-si Chungcheongbuk-do, KR;

Jong Hoon Kim, Suwon-si Gyeonggi-do, KR;

Han Jun Bae, Seongnam-si Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 23/3128 (2013.01); H01L 23/367 (2013.01); H01L 24/17 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15321 (2013.01);
Abstract

There may be provided a method of manufacturing a semiconductor package. The method may include disposing a first semiconductor device and through mold ball connectors (TMBCs) on a first surface of an interconnection structure layer, forming a molding layer on the first surface of the interconnection structure layer to expose a portion of each of the TMBCs, attaching outer connectors to the exposed portions of the TMBCs, mounting a second semiconductor device on a second surface of the interconnection structure layer opposite to the molding layer, and attaching a heat spreader to the second surface of the interconnection structure layer to overlap with a portion of the first semiconductor device.


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