The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 19, 2017
Filed:
Sep. 02, 2015
Mediatek Inc, Hsin-Chu, TW;
Fu-Kang Pan, New Taipei, TW;
Nan-Cheng Chen, Hsin-Chu, TW;
Shih-Chieh Lin, Taipei, TW;
Hui-Chi Tang, Hsinchu, TW;
Ying Liu, Shenzhen, CN;
Yang Liu, Shenzhen, CN;
Ching-Chih Li, New Taipei, TW;
MEDIATEK INC, Hsin-chu, TW;
Abstract
A layout method for a printed circuit board (PCB) is provided. The method obtains a memory type of a dynamic random access memory (DRAM) to be mounted on the PCB, obtains a module group from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules, obtains a plurality of PCB parameters, selects a specific routing module from the module group according to the PCB parameters, and implements the specific routing module into a layout design for PCB fabrication. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.