The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Aug. 11, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Madan Krishnappa, San Diego, CA (US);

Chinh Tran, San Diego, CA (US);

Li Zhang, San Diego, CA (US);

Alan Young, Carlsbad, CA (US);

William Bainbridge, San Diego, CA (US);

Bohuslav Rychlik, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); H03M 13/00 (2006.01); H03M 13/11 (2006.01); G06F 1/32 (2006.01); G06F 11/30 (2006.01); G11B 20/18 (2006.01);
U.S. Cl.
CPC ...
G06F 11/10 (2013.01); G06F 1/3206 (2013.01); G06F 1/3296 (2013.01); G06F 11/1008 (2013.01); H03M 13/11 (2013.01); H03M 13/611 (2013.01); G06F 11/3058 (2013.01); G06F 11/3062 (2013.01); G11B 20/1816 (2013.01); H03M 13/6505 (2013.01); Y02B 60/1285 (2013.01);
Abstract

Various embodiments of methods and systems for bit flip identification for debugging and/or power management in a system on a chip ('SoC') are disclosed. Exemplary embodiments seek to identify bit flip occurrences near in time to the occurrences by checking parity values of data blocks as the data blocks are written into a memory component. In this way, bit flips occurring in association with a write transaction may be differentiated from bit flips occurring in association with a read transaction. The distinction may be useful, when taken in conjunction with various parameter levels identified at the time of a bit flip recognition, to debug a memory component or, when in a runtime environment, adjust thermal and power policies that may be contributing to bit flip occurrences.


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