System and method for monitoring bus transactions within a programmable integrated circuit by selectively inserting detector circuit at user specified insertion point corresponding to a bus interconnect

Abstract

An integrated circuit including a universal monitor system includes a detector circuit. The detector circuit includes a start trigger circuit receiving first signals, an end trigger circuit receiving second signals, and a latency circuit coupled to outputs of the start and end trigger circuits. The start trigger circuit detects a start event from the first signals. The end trigger circuit detects an end event from the second signals. The detector circuit further includes: a data trigger circuit receiving third signals and detecting transferred data therefrom; a first counter circuit coupled to the latency circuit and calculating a total latency; a second counter circuit coupled to at least one of the start trigger circuit and counting start events, or the end trigger circuit and counting end events; and a third counter circuit coupled to an output of the data trigger circuit and counting a total amount of data transferred.