The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2017

Filed:

Dec. 11, 2015
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Hocine Bouzid Ziad, Kortrijk, BE;

Peter Moens, Zottegem, BE;

Eddy De Backer, Merelbeke, BE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/205 (2006.01); H01L 21/02 (2006.01); H01L 29/778 (2006.01); H01L 23/00 (2006.01); H01L 29/20 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/205 (2013.01); H01L 21/02021 (2013.01); H01L 21/0242 (2013.01); H01L 21/0254 (2013.01); H01L 21/02087 (2013.01); H01L 21/02381 (2013.01); H01L 21/02458 (2013.01); H01L 21/02595 (2013.01); H01L 21/02598 (2013.01); H01L 21/02639 (2013.01); H01L 23/562 (2013.01); H01L 29/0692 (2013.01); H01L 29/1604 (2013.01); H01L 29/2003 (2013.01); H01L 29/513 (2013.01); H01L 29/66462 (2013.01); H01L 29/7783 (2013.01); H01L 29/7787 (2013.01); H01L 21/02433 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor wafer can include a substrate, a poly template layer, and a semiconductor layer. The substrate has a central region and an edge region, the poly template layer is disposed along a peripheral edge of the substrate, and a semiconductor layer over the central region, wherein the semiconductor layer is monocrystalline. In an embodiment, the poly template layer and the monocrystalline layer are laterally spaced apart from each other by an intermediate region. In another embodiment, the semiconductor layer can include aluminum. A process of forming the substrate can include forming a patterned poly template layer within the edge region and forming a semiconductor layer over the primary surface. Another process of forming the substrate can include forming a semiconductor layer over the primary surface and removing a portion of the semiconductor layer so that the semiconductor layer is spaced apart from an edge of the substrate.


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