The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2017

Filed:

Apr. 14, 2016
Applicants:

Hannstar Display (Nanjing) Corporation, Nanjing, CN;

Hannstar Display Corporation, Taipei, TW;

Inventors:

Sung-Chun Lin, Tainan, TW;

Hsuan-Chen Liu, Kaohsiung, TW;

Chien-Ting Chan, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/20 (2006.01); G11C 19/00 (2006.01); G06F 1/04 (2006.01); G09G 5/14 (2006.01); G11C 19/28 (2006.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
G09G 3/2085 (2013.01); G06F 1/04 (2013.01); G09G 3/20 (2013.01); G09G 3/2092 (2013.01); G09G 3/3266 (2013.01); G09G 3/3677 (2013.01); G09G 5/14 (2013.01); G11C 19/00 (2013.01); G11C 19/28 (2013.01); G09G 2310/0213 (2013.01); G09G 2310/0243 (2013.01); G09G 2310/0283 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01);
Abstract

The invention discloses a gate driving circuit and a display device. The gate driving circuit includes first to eighth dock signal lines and first to Nstage first shift registers, where N is an integer greater than or equal to 9. The first to eighth clock signal lines are configured to provide first to eighth clock signals, respectively. The istage first shift register is coupled to one of the first to eighth clock signal lines and receives one of the first to eighth clock signals, a first input signal and a second input signal and outputs an istage first output signal, where i is any integer from 1 to N.


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