Peripheral component interconnect express controllers configured with non-volatile memory express interfaces

Abstract

Systems and methods presented herein provide for SSD data storage via PCIe controllers configured with NVMe interfaces. In one embodiment, a PCIe controller includes a plurality of buffers, a Dynamic Random Access Memory (DRAM) device, and an I/O processor operable to partition the DRAM device into a plurality of logical blocks. The controller also includes virtual function logic communicatively coupled to the logical blocks of the DRAM device and to the buffers. The virtual function logic is coupled to a host system through the I/O processor to process an I/O request from the host system to a logical block of the DRAM device, to retrieve data from the logical block to at least one of the buffers, and to transfer the data from the buffer to the host system.