The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2017
Filed:
Oct. 20, 2011
Matthew Turnquist, Helsinki, FI;
Lauri Koskinen, Helsinki, FI;
Jani Mäkipää, Espoo, FI;
Erkka Laulainen, Helsinki, FI;
Matthew Turnquist, Helsinki, FI;
Lauri Koskinen, Helsinki, FI;
Jani Mäkipää, Espoo, FI;
Erkka Laulainen, Helsinki, FI;
Minima Processor Oy, Oulu, FI;
Abstract
A field effect transistor current mode differential logic circuit comprising load transistors for converting the current output of each differential leg current to voltage output, and means for configuring the bulk of each differential leg's load transistor to be connected to the drain of the load transistor for use the logic circuit in Subthreshold Source Coupled Logic (STSCL) mode, and means for configuring the bulk of each leg load transistor to be connected to a voltage or to source of the same transistor for use in MOS current more logic (MCML) operation.