The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2017

Filed:

Oct. 27, 2016
Applicant:

Samsung Display Co., Ltd., Yongin-si, Gyeonggi-Do, KR;

Inventors:

Bong-Kyun Kim, Yongin, KR;

Seung-Ho Yoon, Yongin, KR;

Shin-Il Choi, Yongin, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/12 (2006.01); H01L 29/786 (2006.01); H01L 29/417 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01); H01L 23/532 (2006.01); H01L 21/465 (2006.01); H01L 21/4763 (2006.01); H01L 21/441 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); H01L 21/441 (2013.01); H01L 21/465 (2013.01); H01L 21/47635 (2013.01); H01L 23/53228 (2013.01); H01L 23/53238 (2013.01); H01L 27/124 (2013.01); H01L 27/1259 (2013.01); H01L 29/41733 (2013.01); H01L 29/45 (2013.01); H01L 29/66969 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A thin film transistor substrate includes a gate electrode disposed on a substrate; a semiconductor layer disposed on the substrate that partially overlaps the gate electrode and includes an oxide semiconductor material; and a source electrode and a drain electrode disposed on the semiconductor layer, where the drain electrode is spaced apart from the source electrode. The source electrode and the drain electrode each include a barrier layer and a main wiring layer, the a main wiring layer is disposed on the barrier layer, and the barrier layer includes a first metal layer disposed on the semiconductor layer, and a second metal layer disposed on the first metal layer.


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