The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2017
Filed:
Sep. 27, 2013
Renesas Electronics Corporation, Tokyo, JP;
Yoshikazu Shimote, Tokyo, JP;
Shinji Baba, Tokyo, JP;
Toshihiro Iwasaki, Tokyo, JP;
Kazuyuki Nakagawa, Tokyo, JP;
Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;
Abstract
In a semiconductor device (SP) according to an embodiment, a solder resist film (first insulating layer, SR) which is in contact with the base material layer, and a resin body (second insulating layer,) which is in contact with the solder resist film and the semiconductor chip, are laminated in between the base material layer (CR) of a wiring substrateand a semiconductor chip (). In addition, a linear expansion coefficient of the solder resist film is equal to or larger than a linear expansion coefficient of the base material layer, and the linear expansion coefficient of the solder resist film is equal to or smaller than a linear expansion coefficient of the resin body. Also, the linear expansion coefficient of the base material layer is smaller than the linear expansion coefficient of the resin body. According to the above-described configuration, damage of the semiconductor device caused by a temperature cyclic load can be suppressed, and thereby reliability can be improved.