The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2017

Filed:

Feb. 17, 2015
Applicant:

Maxim Integrated Products, Inc., San Jose, CA (US);

Inventors:

Neyaz Khan, Plano, TX (US);

Madhavi Kulkarni, Dallas, TX (US);

Assignee:

MAXIM Integrated Products, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/26 (2006.01); G06F 11/36 (2006.01);
U.S. Cl.
CPC ...
G06F 11/26 (2013.01); G06F 11/3604 (2013.01);
Abstract

A device verification system includes a device under test (DUT) including digital logic and a plurality of digital memories coupled to the digital logic; a plurality of hardware Verification Intellectual Property (VIP) modules coupled to the DUT to verify hardware of the DUT; and a plurality of software VIP modules coupled to the DUT to verify firmware of the DUT. A method for verifying the functionality of a device under test includes automatically developing code segments representing a series of firmware test patterns with a software Verification Intellectual Property (VIP) module; transferring code segments representing the series of firmware test patterns into a digital memory of a device under test (DUT) that includes digital logic; and monitoring the functional operation of the DUT as it uses the digital logic to execute the code segments representing the series of firmware test patterns stored in digital memory.


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