The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2017

Filed:

Apr. 15, 2015
Applicants:

Zvika Guz, Palo Alto, CA (US);

Liang Yin, San Jose, CA (US);

Inventors:

Zvika Guz, Palo Alto, CA (US);

Liang Yin, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 7/00 (2006.01); G06F 11/30 (2006.01); G06F 15/76 (2006.01); G06F 9/30 (2006.01); G06F 9/38 (2006.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 7/00 (2013.01); G06F 9/3001 (2013.01); G06F 9/3004 (2013.01); G06F 9/30018 (2013.01); G06F 9/3877 (2013.01); G06F 11/30 (2013.01); G06F 15/76 (2013.01); G06F 15/7821 (2013.01); Y02B 60/1207 (2013.01); Y02B 60/1225 (2013.01);
Abstract

A Processing-In-Memory (PIM) model in which computations related to the POPCOUNT and logical bitwise operations are implemented within a memory module and not within a host Central Processing Unit (CPU). The in-memory executions thus eliminate the need to shift data from large bit vectors throughout the entire system. By off-loading the processing of these operations to the memory, the redundant data transfers over the memory-CPU interface are greatly reduced, thereby improving system performance and energy efficiency. A controller and a dedicated register in the logic die of the memory module operate to interface with the host and provide in-memory executions of popcounting and logical bitwise operations requested by the host. The PIM model of the present disclosure thus frees up the CPU for other tasks because many real-time analytics tasks can now be executed within a PIM-enabled memory itself. The memory module may be a Three Dimensional Stack (3DS) memory or any other semiconductor memory.


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