The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Apr. 11, 2017
Applicant:

Avnera Corporation, Beaverton, OR (US);

Inventors:

Samuel J. Peters, II, Beaverton, OR (US);

Eric P. Etheridge, Sherwood, OR (US);

Victor Lee Hansen, Portland, OR (US);

Alexander C. Stange, Portland, OR (US);

Assignee:

AVNERA CORPORATION, Beaverton, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/033 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04L 7/033 (2013.01); H04L 7/0029 (2013.01);
Abstract

A method can include a digital oversampler oversampling an input data stream, a rate generator selecting a frequency that is not less than an expected frequency of the input data stream, a rate generator clock of the rate generator outputting a clock signal that has the selected frequency, determining whether a sample receiver has received at least one sample of the input data stream from the digital oversampler, and, responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler, incrementing a sample counter by each received sample. The method can also include a sample rate converter accumulating samples from the sample receiver at the rate of a 'toothless' clock signal, determining whether an output of the sample counter is greater than zero, and, responsive to a determination that the output of the sample counter is greater than zero, an AND gate passing the 'toothless' clock signal to the sample rate converter.


Find Patent Forward Citations

Peters, II, Samuel. (2017). Spdif clock and data recovery with sample rate converter (U.S. Patent No. 9832012). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9832012

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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