The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Aug. 28, 2015
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Sherif Abdelhalem, San Diego, CA (US);

Frank Zhang, Plano, TX (US);

Abdellatif Bellaouar, Richardson, TX (US);

Sherif Embabi, Allen, TX (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/68 (2006.01); H03F 3/193 (2006.01); H03F 1/22 (2006.01); H03F 3/21 (2006.01); H03F 3/72 (2006.01); H03F 1/07 (2006.01); H03F 1/02 (2006.01); H03F 3/60 (2006.01);
U.S. Cl.
CPC ...
H03F 3/193 (2013.01); H03F 1/223 (2013.01); H03F 3/211 (2013.01); H03F 3/72 (2013.01); H03F 1/0288 (2013.01); H03F 1/07 (2013.01); H03F 3/602 (2013.01); H03F 2200/111 (2013.01); H03F 2200/294 (2013.01); H03F 2200/396 (2013.01); H03F 2200/429 (2013.01); H03F 2203/7209 (2013.01);
Abstract

A low noise amplifier includes a first input transistor coupled to an input signal and a second input transistor coupled to the input signal. The low noise amplifier also includes a first output transistor, coupled between the first input transistor and a first carrier aggregation load, configured to connect the first input transistor to the first carrier aggregation load. Additionally, the low noise amplifier includes a second output transistor, coupled between the first input transistor and a second carrier aggregation load, configured to connect the first input transistor to the second carrier aggregation load. Further, the low noise amplifier includes a third output transistor, coupled between the second input transistor and the second carrier aggregation load, configured to connect the second input transistor to the second carrier aggregation load. Also included are a method of operating a low noise amplifier and an extended carrier low noise amplifier.


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