The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Mar. 22, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Takamasa Okawa, Yokkaichi, JP;

Shigeki Kobayashi, Kuwana, JP;

Kei Sakamoto, Nagoya, JP;

Ryosuke Sawabe, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 27/115 (2017.01); H01L 21/768 (2006.01); H01L 27/11556 (2017.01);
U.S. Cl.
CPC ...
H01L 21/76843 (2013.01); H01L 21/76897 (2013.01); H01L 23/528 (2013.01); H01L 27/11556 (2013.01);
Abstract

According to an embodiment, a semiconductor memory device includes a plurality of first conductive layers disposed above a substrate in a laminating direction. A stepped wiring area includes a second conductive layer electrically connected to the first conductive layer. The second conductive layer has an end portion as a contact connection portion. A contact plug is connected to the contact connection portion. The contact plug extends in the laminating direction. The contact plug includes a first member and a second member. The first member extends in the laminating direction. The second member extends in a direction intersecting with the laminating direction inside the contact connection portion.


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