The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

May. 02, 2016
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Peter Lee, Pleasanton, CA (US);

Winston Lee, Palo Alto, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 11/419 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 7/1051 (2013.01); G11C 7/1078 (2013.01); G11C 7/22 (2013.01);
Abstract

Systems and methods described herein provide a memory cell circuit. The memory cell circuit includes a first internal node communicatively coupled to a first write bit line via a first write pass gate, and a second internal node communicatively coupled to a second write bit line via a second write pass gate. The memory cell circuit further includes a first read bit line connected to a first read pass gate and a first transistor, and a second read bit line connected to a second read pass gate and a second transistor. The first internal node is decoupled from the first read bit line by the first transistor, and the second internal node is decoupled from the second read bit line by the second transistor when a write operation and a read operation occur at the same time.


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