The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Jan. 20, 2016
Applicant:

Anaglobe Technology, Inc., Hsinchu, TW;

Inventors:

I-Peng Wu, Taipei, TW;

Hung-Chih Ou, Taipei, TW;

Yao-Wen Chang, Taipei, TW;

Yu-Tsang Hsieh, Hsinchu County, TW;

Assignee:

AnaGlobe Technology, Inc., Hsin Chu City, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5072 (2013.01); G06F 17/5036 (2013.01); G06F 17/5077 (2013.01);
Abstract

A method for analog circuit placement is proposed. The method comprises inputting a plurality of modules, a netlist and a constraint file. Next, it is performing a step of establishing a QB-tree construction. Then, a node perturbation of QB-tree is performed after establishing the QB-tree construction. Subsequently, it is performing a step of a look-ahead constraint checking to check whether meet constraints of the constraint file or not, followed by performing a QB-tree packing when meet constraints of the constraint file. Next, it is performing a process of performing a cost evaluation.


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