The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 2017
Filed:
Nov. 21, 2012
Nvidia Corporation, Santa Clara, CA (US);
David Conrad Tannenbaum, Austin, TX (US);
Colin Sprinkle, Sunnyvale, CA (US);
Stuart F. Oberman, Sunnyvale, CA (US);
Ming Y. Siu, Santa Clara, CA (US);
Srinivasan Iyer, Austin, TX (US);
Ian-Chi Yan Kwong, Santa Clara, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
An approach is provided for enabling power reduction in floating-point operations. In one example, a system receives floating-point numbers of a fused multiply-add instruction. The system determines the fused multiply-add instruction does not require compliance with a standard of precision for floating-point numbers. The system generates gating signals for an integrated circuit that is configured to perform operations of the fused multiply-add instruction. The system then sends the gating signals to the integrated circuit to turn off a plurality of logic gates included in the integrated circuit.