The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Dec. 28, 2015
Applicant:

Via Technologies, Inc., New Taipei, TW;

Inventors:

G. Glenn Henry, Austin, TX (US);

Darius D. Gaskins, Austin, TX (US);

Assignee:

VIA TECHNOLOGIES, INC., New Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/32 (2006.01); G06F 1/24 (2006.01); G06F 13/36 (2006.01); G06F 15/163 (2006.01); G06F 9/30 (2006.01); G06F 9/50 (2006.01); G06F 9/445 (2006.01); G06F 15/82 (2006.01); G06F 11/36 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G06F 1/24 (2013.01); G06F 1/3243 (2013.01); G06F 1/3287 (2013.01); G06F 9/30076 (2013.01); G06F 9/30083 (2013.01); G06F 9/44505 (2013.01); G06F 9/5094 (2013.01); G06F 13/36 (2013.01); G06F 15/163 (2013.01); G06F 15/82 (2013.01); G06F 11/1423 (2013.01); G06F 11/3664 (2013.01); Y02B 60/1228 (2013.01); Y02B 60/142 (2013.01);
Abstract

A multi-die package for a microprocessor provides a power management synchronization system. The package has a plurality of dies. Each die has a plurality of cores, including a single master core. A plurality of sideband non-system-bus inter-die communication wires communicatively couple the dies to each other for a purpose of synchronizing power management. The master core of each die is configured to use one and only one of the inter-die communication wires to transmit power management synchronization messages to each of the other master cores. The master core of each die is also configured to receive power management synchronization messages from each of the other master cores via one or more inter-die communication wires. The cores use this system of inter-die communication wires to synchronize management of resources that affect both the performance and power consumption of the cores.


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