The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 2017
Filed:
Aug. 19, 2014
Applicant:
Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;
Inventors:
Hyoung-Rae Lee, Asan-si, KR;
Moon Ju Kim, Asan-si, KR;
Eun Suk Kim, Asan-si, KR;
Seok-Kun Yoon, Seoul, KR;
Kwang Youl Lee, Asan-si, KR;
Jong-Won Choo, Seongnam-si, KR;
Assignee:
Samsung Display Co., Ltd., , KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); C23C 14/08 (2006.01); C23C 14/35 (2006.01); C23C 14/56 (2006.01);
U.S. Cl.
CPC ...
C23C 14/08 (2013.01); C23C 14/086 (2013.01); C23C 14/352 (2013.01); C23C 14/562 (2013.01); H01L 21/02565 (2013.01); H01L 27/1225 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78696 (2013.01); H01L 21/02631 (2013.01);
Abstract
An exemplary embodiment provides a thin film transistor array panel, including: a substrate; an oxide semiconductor layer disposed on the substrate; an insulating layer disposed on the oxide semiconductor layer; and a pixel electrode disposed on the insulating layer. The oxide semiconductor layer includes a first layer and a second layer disposed on the first layer, the second layer includes an oxide semiconductor including silicon, and the second layer contacts the insulating layer.