The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2017
Filed:
Jul. 06, 2015
Qualcomm, Incorporated, San Diego, CA (US);
Mohammed Mizanur Rahman, San Diego, CA (US);
Jacob Stephen Schneider, San Diego, CA (US);
Thomas Clark Bryan, Carlsbad, CA (US);
LuVerne Ray Peterson, San Diego, CA (US);
Gregory Francis Lynch, San Diego, CA (US);
Alvin Leng Sun Loke, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A programmable equalizer and related method are provided. The equalizer includes a pair of current-setting field effect transistors (FETs) coupled in series with a pair of input FETs and a pair of load resistors, respectively, between a first voltage rail (Vdd) and a second voltage rail (ground). A programmable equalization circuit is coupled between the sources of the input FETs, comprising a plurality of selectable resistive paths and a variable capacitor, which could also be configured as a plurality of selectable capacitive paths. Each of the selectable resistive paths (as well as each of the selectable capacitive paths) include a selection FET for selectively coupling the corresponding resistive (or capacitive) path between the sources of the input FETs. In the case where one of the input FETs is biased with a reference gate voltage, the source of each selection FET is coupled to the source of such input FET.