The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2017
Filed:
Jun. 01, 2015
Applicant:
Nec Toshiba Space Systems, Ltd., Fuchu-shi, Tokyo, JP;
Inventors:
Assignee:
NEC SPACE TECHNOLOGIES, LTD., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 5/06 (2006.01); H01L 23/047 (2006.01); H01L 23/08 (2006.01); H01L 21/48 (2006.01); H01L 23/057 (2006.01); H01L 23/10 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H05K 5/069 (2013.01); H01L 21/4817 (2013.01); H01L 21/4853 (2013.01); H01L 23/047 (2013.01); H01L 23/057 (2013.01); H01L 23/08 (2013.01); H01L 23/10 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/16195 (2013.01); Y10T 29/49149 (2015.01);
Abstract
A package that hermetically seals an integrated circuit includes a metal lid () and a metal housing () having an open upper portion (). In the package, the housing () includes in a wall surface thereof a glass unit () that seals a plurality of lead terminals therein. The glass unit () is disposed in a wall surface of the housing () such that a thickness in a vertical direction of the wall surface on an upper side of the glass unit () is determined according to a threshold limit value of a difference in temperature between glass that forms the glass unit () and metal that forms the wall surface.