The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

May. 11, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Wei Guo, San Diego, CA (US);

Sang Min Lee, San Diego, CA (US);

Behnam Sedighi, San Diego, CA (US);

Dongwon Seo, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/78 (2006.01); H03M 1/00 (2006.01); H03M 1/74 (2006.01);
U.S. Cl.
CPC ...
H03M 1/785 (2013.01); H03M 1/00 (2013.01); H03M 1/747 (2013.01);
Abstract

The present disclosure describes aspects of current removal for digital-to-analog converters (DACs). In some aspects, a circuit for converting a digital input to an analog output includes a first resistor ladder having first resistors connectable to respective current sources and connected to a first output of the circuit. The circuit also includes second resistor ladder having second resistors connectable to the respective current sources and connected to a second output of the circuit. A common node is formed between common resistor terminals of the first resistor ladder and the second resistor ladder. Current removal circuitry is connected to the common node and referenced to an amount of current provided by the respective current sources. By removing current from the common node of the resistor ladders, common-mode current at outputs of the circuit can be reduced with minimal degradation of differential performance of the circuit.


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