The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Jun. 25, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Stephen W. Bedell, Wappingers Falls, NY (US);

Effendi Leobandung, Stormville, NY (US);

Devendra K. Sadana, Pleasantville, NY (US);

Min Yang, Yorktown Heights, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/161 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1211 (2013.01); H01L 29/0649 (2013.01); H01L 29/161 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

Methods and devices are provided to fabricate semiconductor devices with, e.g., SiGe-on-insulator structures. For example, a method for fabricating a semiconductor device includes forming a crystalline buffer layer on a substrate, forming an epitaxial semiconductor layer on the crystalline buffer layer, patterning the epitaxial semiconductor layer to form a patterned epitaxial semiconductor layer, and oxidizing a surface region of the crystalline buffer layer selective to the patterned epitaxial semiconductor layer to convert the surface region of the crystalline buffer layer to an insulating layer. The insulating layer insulates the patterned epitaxial semiconductor layer from the crystalline buffer layer. In one example structure, the substrate is a silicon substrate, the crystalline buffer layer is formed of germanium, the epitaxial semiconductor layer is formed of silicon-germanium, and the insulating layer is formed of amorphous germanium-oxide.


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