The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2017
Filed:
Jun. 09, 2016
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;
Inventors:
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G06F 12/02 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G06F 12/0246 (2013.01); G06F 12/0253 (2013.01); G11C 11/5671 (2013.01); G11C 16/0416 (2013.01); G11C 16/0466 (2013.01); G11C 16/3445 (2013.01); G06F 2212/7205 (2013.01);
Abstract
An erase method of a nonvolatile memory device includes setting an erase mode, and performing one of a normal erase operation and a quick erase operation according to the set erase mode. The normal erase operation is performed to set a threshold voltage of a memory cell to an erase state which is lower than a first erase verification level. The quick erase operation is performed to set a threshold voltage of a memory cell to a pseudo erase state which is lower than a second erase verification level. The second erase verification level is higher than the first erase verification level.