The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Mar. 12, 2015
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;

Inventor:

Naoaki Tsutsui, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/41 (2006.01); H01L 27/12 (2006.01); H01L 29/78 (2006.01); H01L 27/11 (2006.01); G11C 5/02 (2006.01); H01L 21/82 (2006.01); H01L 27/10 (2006.01); H01L 27/08 (2006.01); H01L 27/06 (2006.01); G11C 11/417 (2006.01); H01L 29/786 (2006.01); H01L 27/088 (2006.01); H01L 27/108 (2006.01); H01L 27/11526 (2017.01); H01L 21/8258 (2006.01); H01L 27/1156 (2017.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
G11C 11/41 (2013.01); G11C 5/025 (2013.01); G11C 11/417 (2013.01); H01L 21/8258 (2013.01); H01L 27/0688 (2013.01); H01L 27/088 (2013.01); H01L 27/10897 (2013.01); H01L 27/1108 (2013.01); H01L 27/11526 (2013.01); H01L 27/1207 (2013.01); H01L 29/786 (2013.01); H01L 29/7869 (2013.01); G11C 11/412 (2013.01); H01L 27/1156 (2013.01);
Abstract

This invention provides a semiconductor device with high speed operation and reduced size. A circuit includes a circuit including a memory circuit and a circuit including a logic circuit; thus, the circuit functions as a memory device having a function of storing data and a function of performing logic operation. The circuit can output, in addition to data stored in the circuit, data corresponding to a result of logic operation performed using data stored in the circuit as an input signal. The circuit can directly obtain a result of logic operation from the circuit, and thus, the frequency of input/output of a signal performed between the circuit and the circuit can be reduced.


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